TC9402EJD【PDF 6/28 页】IC V-FREQ/FREQ-V CONV 14CDIP

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Sheet目录46

2页 3页 4页 5页 [6页]7页 8页 9页 10页

TC9400/9401/9402

DS21483D-page 6

?2007 Microchip Technology Inc.

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table2-1.

TABLE 2-1: PIN FUNCTION TABLE

2.1 Bias Current (I

BIAS

)

An external resistor, connected to V

, sets the bias

point for the TC9400. Specifications for the TC9400 are

based on R

BIAS

= 100k??0%, unless otherwise

noted.

Increasing the maximum frequency of the TC9400

beyond 100kHz is limited by the pulse width of the

pulse output (typically 3祍). Reducing R

BIAS

will

decrease the pulse width and increase the maximum

operating frequency, but linearity errors will also

increase. R

BIAS

can be reduced to 20k? which will

typically produce a maximum full scale frequency of

500kHz.

2.2 Zero Adjust

This pin is the non-inverting input of the operational

amplifier. The low frequency set point is determined by

adjusting the voltage at this pin.

2.3 Input Current (I

)

The inverting input of the operational amplifier and the

summing junction when connected in the V/F mode. An

input current of 10 糀 is specified, but an over range

current up to 50 糀 can be used without detrimental

effect to the circuit operation. I

connects the summing

junction of an operational amplifier. Voltage sources

cannot be attached directly, butmust be buffered by

external resistors.

2.4 Voltage Capacitor (V

REF

Out)

The charging current for C

REF

is supplied through this

pin. When the op amp output reaches the threshold

level, this pin is internally connected to the reference

voltage and a charge, equal to V

REF

x C

REF

, is removed

from the integrator capacitor. After about 3約ec, this pin

is internally connected to the summing junction of the

op amp to discharge C

REF

. Break-before-make switch-

ing ensures that the reference voltage is not directly

applied to the summing junction.

2.5 Voltage Reference (V

REF

)

A reference voltage from either a precision source, or

the V

supply is applied to this pin. Accuracy of the

TC9400 is dependent on the voltage regulation and

temperature characteristics of the reference circuitry.

Since the TC9400 is a charge balancing V/F converter,

the reference current will be equal to the input current.

For this reason, the DC impedance of the reference

voltage source must be kept low enough to prevent

linearity errors. For linearity of 0.01%, a reference

impedance of 200?or less is recommended. A 0.1礔

bypass capacitor should be connected from V

REF

ground.

Pin No.

Symbol

Description

BIAS

This pin sets bias current in the TC9400. Connect to V

through a 100k?resistor.

ZERO ADJ Low frequency adjustment input.

Input current connection for the V/F converter.

Negative power supply voltage connection, typically -5V.

REF

OUT Reference capacitor connection.

GND Analog ground.

REF

Voltage reference input, typically -5V.

PULSE FREQ

OUT

Frequency output. This open drain output will pulse LOW each time the Freq.

Threshold Detector limit is reached. The pulse rate is proportional to input voltage.

OUTPUT

COMMON

Source connection for the open drain output FETs.

FREQ/2 OUT This open drain output is a square wave at one-half the frequency of the pulse output

(Pin 8). Output transitions of this pin occur on the rising edge of Pin 8.

THRESHOLD

DETECTOR

Input to the Threshold Detector. This pin is the frequency input during F/V operation.

AMPLIFIER OUT Output of the integrator amplifier.

No internal connection.

Positive power supply connection, typically +5V.

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